IDEA #2VEETD Systems and methods involving field programmable gate arrays

A method for programming logic in a field programmable gate array (FPGA) comprising, receiving a logic process including a logic node, and associating the node with a logic descriptor, and saving the logic descriptor in a memory of the FPGA. The logic descriptor including: a unique identifier of the node, an enabling indicator operative to indicate if the node is enabled, a function indicator operative to define a logic function performed by the node, an input number indicator operative to define a number of inputs of the node, an output indicator operative to indicate a logic state of an output of the node, and an input indicator operative to indicate a unique identifier of an input of the node. https://app.acclaimip.com/pdf/CdTUAKSZAyA51NRlQZkDLFKcvzpsnSsHgaUgdwg/US7592833B1